Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add f32 prelu RVV microkernels, tests and config. #6583

Open
wants to merge 7 commits into
base: master
Choose a base branch
from

Conversation

KaustubhIMG
Copy link
Contributor

No description provided.

An rvv rvv generator has been added to facilitate the generation of ukernels with different ROW_TILE and LMUL sizes.
This commit introduces support for generating RVV f32-avgpool microkernels with various vector lengths in the 'generate-f32-avgpool' script.
This commit introduces microkernels to optimize f32 prelu operations for different vector lengths and row tiles.
In this commit, include test cases for the f32-prelu operation for variable vlenb cases. All test cases have been generated using the scripts/generate-tests.sh script.
In this commit update the f32_prelu_config to optimized rvv implemetation. Update the rvv.c file in amalgam as per config.
@KaustubhIMG
Copy link
Contributor Author

@fbarchard Can you review the changes?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants